Tagma

Hashless Direct Identification by Fixed 3‑Axis Coordinate Primitive

Author
Affiliation

SSCCS Foundation

SSCCS Foundation

Published

July 15, 2026

Tagma is a structural identity primitive: a 16-bit coordinate space in the Unicode Hangul syllable block that replaces hash-based addressing with a combinational decoder — collision-free, zero hash, single-cycle decode.

Computing standards are language-neutral and culture-neutral universal assets. Every content-addressable system today generates identifiers through a hash function — a layer of indirection with measurable cost in gates, cycles, and collisions. Tagma shows that a fixed 16-bit Unicode block can replace the hash function entirely where cryptographic integrity is not required.

The Hangul Coordinate Space

The composition formula is:

\[C(i,m,f) = \text{U+AC00} + 588i + 28m + f, \quad 0 \leq i < 19,\; 0 \leq m < 21,\; 0 \leq f < 28\]

Every valid 16-bit value carries three simultaneous interpretations: a 1-D Unicode address, a 3-D coordinate, and a Hangul syllable. Internally, the 16 bits are organized as a 3-axis coordinate packed into a 16-bit word:

Figure 1: 맨 (U+B9E8, "man"): three-axis syllable coordinate (6, 1, 4) packed into a 16-bit word.
Figure 2: Three-dimensional bitcell organization. 19 x 21 x 28 lattice, 11,172 of 65,536 states valid.

One value, three uses. Only Hangul satisfies all four conditions required for the Tagma primitive: a fixed closed-form composition formula, complete fixed-width 16-bit representation, a structural invalidity margin, and an open international standard. The coordinate space extends via the Cartesian product: each syllable multiplies the addressable space by 11,172. A linear array is indexed by flattening the N-dimensional coordinate in row-major order, where every coordinate corresponds to a 3N-dimensional structural coordinate system.

Hash-less computation: Direct structural addressing

In conventional computing, identity is established through indirection:

Figure 3: Traditional hash-based identity model.

Each step adds cost: hash computation, collision handling, dynamic resizing, cache-unfriendly access patterns. Tagma replaces this with direct structural addressing:

Figure 4: Tagma direct structural addressing.

Comparison with Existing Paradigms

Method Identifier size Generation cost Collision Lookup structure
Pointer 32-64 bits zero none direct (location-based)
Hash (SHA-256) 256 bits ~10K gates, 64-75 cycles probabilistic hash table + resolution
UUID 128 bits entropy-dependent probabilistic hash table
CAM per-bit comparison 9-16 transistors/bit none associative
Tagma 16 bits 1 cycle (combinational) none (formulaic) direct (coordinate = address)

Application Examples

Domain Current Approach Tagma Alternative
ID generation Hash of content (SHA-256, BLAKE3) Coordinate assignment (1–2 cycles, zero collision)
Hash map key Hash of key to compute bucket index Tagma coordinate as direct array index
Associative lookup CAM or hash table Direct SRAM addressing (~300 gates, 1 cycle)
Temporal indexing Hash table per time bucket Linearized coordinate t * 11172 + coord
Sensor identification UUID or random ID per object Deterministic coordinate, 2 bytes, no entropy
Proximity search B-tree or k-d tree index Field-wise Hamming distance (parallel XOR)
Built-in validity ECC or checksum Structural fault detection (24.1% average SEU)

Tagma does not replace cryptographic primitives — SHA-256 remains for signatures, integrity verification, and key derivation.

Benchmark: Tagma vs SHA-256

Latency comparison for 100,000 identity generation operations on an GitHub Actions CI runner (x86_64), single-threaded, compiled with rustc stable in release mode.

Figure 5: Identity generation latency: Tagma vs SHA-256, 100k operations on GitHub CI (x86_64).
Metric SHA-256 Tagma (1-syll) Tagma (6-syll) Tagma (19-syll)
Latency per op 4437 ns 20 ns 153 ns 456 ns
Identity size 32 bytes 2 bytes 12 bytes 38 bytes
Addressable space \(2^{256}\) \(1.12 \times 10^4\) \(1.94 \times 10^{24}\) \(2^{256}\)
Collision probabilistic deterministic zero deterministic zero deterministic zero
Multi-axis query \(O(K \times N)\) \(O(1)\) direct \(O(1)\) direct \(O(1)\) direct

Data Structures

TagmaCoord is a 16-bit value guaranteed valid. Map is a fixed array of 11,172 slots indexed by coordinate — O(1) guaranteed, no collisions, ~22 KB. Set is a 1.4 KB bit array with bitwise union/intersection/difference. TimeIndex maps timestamps to coordinates via time * 11172 + coord.

Application Domains

The deterministic single-cycle decode makes Tagma suitable for real-time and safety-critical systems. The three-decoder topology of the future path reduces worst-case decode latency compared to a single linear decoder.

Radiation-tolerant computing. The structural validity check embedded in every decode provides inherent error detection. A single-bit upset that maps a valid coordinate outside the U+AC00-U+D7AF range produces an immediate invalid flag. Errors that map one valid coordinate to another are not detected by the structural check alone and require ECC supplementation, as noted in Boundaries. The decoder’s small gate count (approximately 300 gates) makes triplication feasible at lower cost than protecting a full hash unit.

An exact enumeration of all 11,172 valid coordinates confirms the detection rate[^seu-enum]. Each valid coordinate has 16 possible single-bit-flip destinations. Averaged across all valid states, 12.14 of those 16 destinations remain within [U+AC00, U+D7AF] (standard deviation 0.61; range 10–13). The resulting average SEU detection rate is 24.1% from the structural check alone, before any ECC supplementation. This detection rate comes at zero additional hardware cost — it is a free byproduct of the structural encoding. When combined with ECC, the structural check handles the subset of errors that map valid coordinates outside the valid range, while ECC handles the remaining cases.

Real-time object identification. In sensor fusion for autonomous systems, Tagma coordinates serve as deterministic object identifiers that do not require hash computation or lookup tables. Each new object is assigned a coordinate at encoding time; subsequent frames reference the same coordinate without recomputation.

Proximity search. The three-axis structure enables field-wise Hamming distance computation through parallel XOR gates, supporting nearest-neighbor lookup without CAM cells or hash-based index intersection.

KV cache addressing. LLM inference engines maintain key-value caches indexed by token sequence prefixes. Current implementations use hash tables or radix trees with \(O(L \times H)\) cost per lookup (sequence length \(L\), hash cost \(H\)). Tagma replaces this with CoordPath-based direct access: each prefix maps to a unique CoordPath of length \(L\), and lookup cost is \(O(L)\) array accesses with zero hash computation. Production KV cache sizes (typically \(10^4\)–\(10^7\) entries) are covered by 2–4 syllables (\(1.25 \times 10^8\) to \(1.55 \times 10^{16}\) identifiers), with deterministic O(1) access and no collision resolution.

Graph adjacency and multi-dimensional query. Graph engines check adjacency via hash lookups or index intersections (\(O(\deg(v))\)) and query multi-dimensional attributes via composite indexes or join operations. Tagma represents each node as a Coord and each edge type as a CoordSet; adjacency reduces to a single bitwise AND over 175 machine words. Multi-dimensional queries (e.g., “nodes with initial=a, medial=b”) project directly to axis ranges without index intersection, with cost independent of graph size.

Vision

Tagma defines a new type of silicon primitive: a combinational decoder that derives identity from structure at approximately 300 gates and one cycle. At this gate cost, content-addressable operation becomes viable where hash-based approaches are too expensive in power, area, or latency.

For the full analysis including decoder specification, XIF coprocessor implementation, and hardware design implications, see the White Paper.

Contact

For inquiries or research collaboration: tagma@ssccs.org.

© 2026 SSCCS Foundation — Open-source computing systems initiative building a computing model, software compiler infrastructure, and open hardware architecture.